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MC74HCT4851A Analog Multiplexers/ Demultiplexers with Injection Current Effect Control with LSTTL Compatible Inputs
Automotive Customized
This device is pin compatible to standard HC4051 and MC14051B analog mux/demux devices, but feature injection current effect control. This makes them especially suited for usage in automotive applications where voltages in excess of normal logic voltage are common. The injection current effect control allows signals at disabled analog input channels to exceed the supply voltage range without affecting the signal of the enabled analog channel. This eliminates the need for external diode/ resistor networks typically used to keep the analog channel signals within the supply voltage range. The devices utilize low power silicon gate CMOS technology. The Channel Select and Enable inputs are compatible with standard CMOS or LSTTL outputs.
Features
16 16 1 PDIP-16 N SUFFIX CASE 648 MC74HCT4851AN AWLYYWWG 1 16 16 1 SOIC-16 D SUFFIX CASE 751B 1 16 16 1 SOIC-16 WIDE DW SUFFIX CASE 751G 1 HCT4851A AWLYWWG HCT4851AG AWLYWW
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* * * * * *
Injection Current Cross-Coupling Less than 1mV/mA (See Figure 4) Pin Compatible to HC4051 and MC14051B Devices Power Supply Range (VCC - GND) = 2.0 to 6.0 V In Compliance With the Requirements of JEDEC Standard No. 7A Chip Complexity: 154 FETs or 36 Equivalent Gates These are Pb-Free Devices*
16 16 1 TSSOP-16 DT SUFFIX CASE 948F 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) HCT48 51A ALYWG G
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2009
November, 2009 - Rev. 1
1
Publication Order Number: MC74HCT4851A/D
MC74HCT4851A
FUNCTION TABLE - MC74HCT4851A
Control Inputs X0 14 X1 15 X2 ANALOG 12 MULTIPLEXER/ INPUTS/ X3 DEMULTIPLEXER OUTPUTS X4 1 5 X5 2 X6 4 X7 11 A CHANNEL 10 B SELECT 9 INPUTS C 6 ENABLE PIN 16 = VCC PIN 8 = GND
13
Enable L L L L L L L L H VCC 16 X2 15
C L L L L H H H H X X1 14
Select B A L L H H L L H H X X0 13 L H L H L H L H X X3 12
ON Channels X0 X1 X2 X3 X4 X5 X6 X7 NONE A 11 B 10 C 9
3
X
COMMON OUTPUT/ INPUT
Figure 1. MC74HCT4851A Logic Diagram Single-Pole, 8-Position Plus Common Off
1 X4
2 X6
3 X
4 X7
5 X5
6
7
8 GND
Enable NC
Figure 2. MC74HCT4851A 16-Lead Pinout (Top View)
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MC74HCT4851A
MAXIMUM RATINGS
Symbol VCC Vin I PD Parameter Positive DC Supply Voltage DC Input Voltage (Any Pin) (Referenced to GND) (Referenced to GND) Value -0.5 to + 7.0 -0.5 to VCC + 0.5 $25 Plastic DIP SOIC Package TSSOP Package 750 500 450 -65 to + 150 260 Unit V V mA mW This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
DC Current, Into or Out of Any Pin Power Dissipation in Still Air,
Tstg TL
Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Plastic DIP, SOIC or TSSOP Package
C C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Vin VIO* TA tr, tf Parameter Positive DC Supply Voltage DC Input Voltage (Any Pin) (Referenced to GND) (Referenced to GND) Min 2.0 GND 0.0 - 55 0 0 0 Max 6.0 VCC 1.2 + 125 1000 500 400 Unit V V V C ns
Static or Dynamic Voltage Across Switch Operating Temperature Range, All Package Types Input Rise/Fall Time (Channel Select or Enable Inputs) VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
*For voltage drops across switch greater than 1.2 V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
DC CHARACTERISTICS -- Digital Section (Voltages Referenced to GND) VEE = GND, Except Where Noted
Symbol VIH Parameter Minimum High-Level Input Voltage, Channel-Select or Enable Inputs Maximum Low-Level Input Voltage, Channel-Select or Enable Inputs Maximum Input Leakage Current on Digital Pins (Enable/A/B/C) Maximum Quiescent Supply Current (per Package) Condition Ron = Per Spec VCC V 4.5 to 5.5 4.5 to 5.5 5.5 5.5 Guaranteed Limit -55 to 25C 2.0 85C 2.0 125C 2.0 Unit V
VIL
Ron = Per Spec
0.8
0.8
0.8
V
Iin ICC
Vin = VCC or GND Vin(digital) = VCC or GND Vin(analog) = GND
0.1 2.0
1.0 20
1.0 40
mA mA
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MC74HCT4851A
DC CHARACTERISTICS -- Analog Section
Guaranteed Limit Symbol Ron DRon Ioff Parameter Maximum "ON" Resistance Delta "ON" Resistance Maximum Off-Channel Leakage Current, Any One Channel Common Channel Condition Vin = VIL or VIH;VIS = VCC to GND; IS 2.0 mA Vin = VIL or VIH; VIS = VCC/2 IS 2.0 mA Vin = VCC or GND VCC 4.5 5.5 4.5 5.5 5.5 -55 to 25C 550 400 80 60 0.1 0.1 0.1 85C 650 500 100 80 0.1 0.1 0.1 125C 750 600 120 100 0.1 0.1 0.1 Unit W W mA
Ion
Maximum On-Channel Leakage Vin = VCC or GND Channel-to-Channel
5.5
mA
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns, VCC = 5.0 V 10%)
Symbol tPHL, tPLH tPHL, tPHZ,PZH tPLH, tPLZ,PZL Cin Parameter Maximum Propagation Delay, Analog Input to Analog Output Maximum Propagation Delay, Enable or Channel-Select to Analog Output VCC 5.0 5.0 -55 to 25C 40 80 85C 45 90 125C 50 100 Unit ns ns
Maximum Input Capacitance (All Switches Off) (All Switches Off) Power Dissipation Capacitance
Digital Pins Any Single Analog Pin Common Analog Pin Typical 5.0
10 35 130 20
10 35 130
10 35 130
pF
CPD
pF
INJECTION CURRENT COUPLING SPECIFICATIONS (VCC = 5V, TA = -55C to +125C)
Symbol VDout Parameter Maximum Shift of Output Voltage of Enabled Analog Channel Condition Iin* 1 mA, RS 3,9 kW Iin* 10 mA, RS 3,9 kW Iin* 1 mA, RS 20 kW Iin* 10 mA, RS 20 kW Typ 0.1 1.0 0.5 5.0 Max 1.0 5.0 2.0 20 Unit mV
* Iin = Total current injected into all disabled channels. 660 600 R on , ON RESISTANCE (OHMS) 540 480 420 360 300 240 180 120 60 0 0.0 0.9 1.8 2.7 3.6 4.5 -55C +25C +125C
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
Figure 3. Typical On Resistance VCC = 4.5V
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MC74HCT4851A
Vin2 / Iin2 meas. here. Current Source HP4155C Smu #2 External DC P.S. VCC = 5 V
X7
4
16
Vin1 = 4.9 V (Smu3) Iin1 meas. Here Vm1 connected here.
RS
X0
13
3
X
Vout Vm2 connected here.
6 8 NOTES: Rs = 3.9 KW or 20 KW. NOTES: Vm1 & Vm2 are internal NOTES: HP4155C Voltmeters.
GND or VSS
Figure 4. Injection Current Coupling Specification
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MC74HCT4851A
5V 6V 5V VCC Sensor HC4051A Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8 (8x Identical Circuitry) Common Out A/D - Input Microcontroller VCC
Figure 5. Actual Technology Requires 32 passive components and one extra 6V regulator to suppress injection current into a standard HC4051 multiplexer
5V VCC Sensor HC4851A Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8 (8x Identical Circuitry) Common Out
VCC
Microcontroller
A/D - Input
Figure 6. MC74HCT4851A Solution Solution by applying the HC4851A multiplexer
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MC74HCT4851A
PLOTTER VCC PROGRAMMABLE POWER SUPPLY + DEVICE UNDER TEST ANALOG IN COMMON OUT VIH 6 8 GND
MINI COMPUTER
DC ANALYZER
VEE OFF VCC A NC OFF
16
VCC
VCC
COMMON O/I
Figure 7. On Resistance Test Set-Up
Figure 8. Maximum Off Channel Leakage Current, Any One Channel, Test Set-Up
VCC
VEE VCC
16 ANALOG I/O OFF OFF
VCC
VCC A ON VEE
16
VCC N/C
COMMON O/I
OFF ANALOG I/O VIL 6 8
COMMON O/I
VCC
VIH
6 8
Figure 9. Maximum Off Channel Leakage Current, Common Channel, Test Set-Up
Figure 10. Maximum On Channel Leakage Current, Channel to Channel, Test Set-Up
VCC CHANNEL SELECT (VI) tPLH ANALOG OUT VI = GND to 3.0 V VM = 1.3 V VCC VM GND tPHL 6 VM 8 ON/OFF ANALOG I/O OFF/ON
VCC 16 COMMON O/I CL* TEST POINT
CHANNEL SELECT *Includes all probe and jig capacitance
Figure 11. Propagation Delays, Channel Select to Analog Out
Figure 12. Propagation Delay, Test Set-Up Channel Select to Analog Out
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MC74HCT4851A
VCC 16 ANALOG IN (VI) tPLH ANALOG OUT VI = GND to 3.0 V VM = 1.3 V VCC VM GND tPHL 6 8 ANALOG I/O ON CL* COMMON O/I TEST POINT
VM
*Includes all probe and jig capacitance
Figure 13. Propagation Delays, Analog In to Analog Out
Figure 14. Propagation Delay, Test Set-Up Analog In to Analog Out
tf ENABLE (VI) tPZL ANALOG OUT VM
tr 90% VM 10% tPLZ VCC GND HIGH IMPEDANCE 10% tPZH tPHZ 90% VM HIGH IMPEDANCE VOH VOL 1 2 VCC 1 2
POSITION 1 WHEN TESTING tPHZ AND tPZH POSITION 2 WHEN TESTING tPLZ AND tPZL VCC 16 ANALOG I/O ON/OFF CL* ENABLE 10kW TEST POINT
6 8
ANALOG OUT VI = GND to 3.0 V VM = 1.3 V
Figure 15. Propagation Delays, Enable to Analog Out
Figure 16. Propagation Delay, Test Set-Up Enable to Analog Out
VCC A VCC ON/OFF ANALOG I/O OFF/ON 16 COMMON O/I NC
6 8 11
VCC
CHANNEL SELECT
Figure 17. Power Dissipation Capacitance, Test Set-Up
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MC74HCT4851A
Disabled Analog Mux Input Vin > VCC + 0.7V P+ Gate = VCC (Disabled) Common Analog Output Vout > VCC P+
+ + +
N - Substrate (on VCC potential)
Figure 18. Diagram of Bipolar Coupling Mechanism Appears if Vin exceeds VCC, driving injection current into the substrate
A
11
INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL
13
X0
14
X1
B
10
INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL
15
X2
12
X3
C
9
INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL
1
X4
5
X5
ENABLE
6
INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL INJECTION CURRENT CONTROL
2
X6
4
X7
3
X
Figure 19. Function Diagram, HC4851A
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MC74HCT4851A
ORDERING INFORMATION
Device MC74HCT4851ANG MC74HCT4851ADG MC74HCT4851ADR2G MC74HCT4851ADTR2G MC74HCT4851ADWG MC74HCT4851ADWR2G Package PDIP-16 (Pb-Free) SOIC-16 (Pb-Free) SOIC-16 (Pb-Free) TSSOP-16* SOIC-16 WIDE (Pb-Free) SOIC-16 WIDE (Pb-Free) Shipping 500 Units / Box 48 Units / Rail 2500 Units / Tape & Reel 2500 Units / Tape & Reel 48 Units / Rail 1000 Units / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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MC74HCT4851A
PACKAGE DIMENSIONS
PDIP-16 N SUFFIX CASE 648-08 ISSUE T
-A-
16 9
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL.
F S
C
L
-T- H K G D
16 PL
SEATING PLANE
J TA
M
M
0.25 (0.010)
M
DIM A B C D F G H J K L M S
INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040
MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
SOIC-16 D SUFFIX CASE 751B-05 ISSUE J
-A-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
16
9
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
DIM A B C D F G J K M P R
0.25 (0.010)
TB
S
A
S
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MC74HCT4851A
SOIC-16 WIDE DW SUFFIX CASE 751G-03 ISSUE C
D
16 M 9
A
q
h X 45_
0.25
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS DIM MIN MAX A 2.35 2.65 A1 0.10 0.25 B 0.35 0.49 C 0.23 0.32 D 10.15 10.45 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 q 0_ 7_
H
M
B
8X
1 16X
8
B TA
S
0.25
M
B
S
A
E B
A1
14X
e
SEATING PLANE
T
C
TSSOP-16 DT SUFFIX CASE 948F-01 ISSUE A
16X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
L
K
16 9
2X
L/2
J1 B -U-
L
PIN 1 IDENT. 1 8
J
N 0.15 (0.006) T U
S
0.25 (0.010) M
A -V- N F DETAIL E
C 0.10 (0.004) -T- SEATING
PLANE
D
G
H
DETAIL E
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CC EE C CCC EE C CC
K1
SECTION N-N
-W-
DIM A B C D F G H J J1 K K1 L M
MC74HCT4851A
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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MC74HCT4851A/D

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